This invention relates to a method and apparatus for fabricating a semiconductor device. More specifically, it pertains to improvements in dry etching technology.
In the fabrication of semiconductor devices, dry etching techniques are used to produce a desired pattern on the surface of a workpiece. A typical patterning technique is made up of a photolithography process and a dry etching process. A photolithography process is a process step of creating a resist pattern having remaining portions and opening portions on a workpiece surface. A dry etching process is a process step of etching away portions of the workpiece corresponding to the opening portions of the resist pattern.
Here, a step of patterning a MOSFET gate electrode is described. As shown in FIG. 18(a), a silicon dioxide layer 7 that becomes a gate oxide layer is deposited on a silicon substrate 6, a polysilicon layer 4 is deposited on the silicon dioxide layer 7, and a resist is applied onto the polysilicon layer 4 to form a resist film 5. Thereafter, a pattern having remaining portions and opening portions is formed in the resist film 5 using a lithography technique. By making use of this resist film 5 as an etch mask, the polysilicon layer 4 is dry etched. 1 is an active species. 2 is an ion. 3 is an etch product produced during the dry etching process.
The polysilicon layer 4 is selectively etched such that recesses 9 are defined according to the opening portions of the resist film 5 and projections 8 are defined according to the remaining portions of the resist film 5, in other words a recess 9 is formed underneath an opening portion and a projection 8 is formed underneath a remaining portion. Referring to FIG. 18(a), there are illustrated two types of projections, i.e., a projection 8a and a projection 8b. The projection 8a is called an isolated projection because it is isolated from its neighboring projection with a great distance. On the other hand, the projection 8b is called a closely spaced projection because, unlike the isolated projection 8a, it is located close to another projection. Additionally, there is an isolated recess 9a on the side of the isolated projection 8a. On the other hand, there is a closely spaced recess 9b on the side of the closely spaced projection 8b. When the polysilicon layer 4 is etched according to the etch mask, the projections 8a, 8b become gate electrodes. Then, the patterning of gate electrodes is completed. In a dry etching technique that uses a reactive gas as an etchant, an etch product, which is produced by reaction between a workpiece and an etch gas, by decomposition of an etch gas, or by the like, sticks to the sidewalls of the projection 8. Such adhesion prevents etching in the lateral direction, and etching proceeds mainly downward, which is called the anisotropic etching. This anisotropic etching enables the projection 8 to have nearly vertical sidewalls, so that the projection 8 and the remaining portion of the resist film 5 come to have almost the same lateral dimension. Therefore, dry etching has been considered one of the most important techniques for semiconductor fine processing.
In recent years, technology for the miniaturization of semiconductor devices has advanced, which however produces the problem that there occurs a CD difference (CD gain and CD loss) between a master pattern and a workpiece pattern in a patterning process. CD stands for critical dimension. In the photolithography process, a resist film acts as a workpiece and therefore CD difference in the photolithography is a dimensional difference between a reticle pattern and a resist pattern. On the other hand, CD difference in the dry etching process is a dimensional difference between a resist pattern and a post-dry etching workpiece pattern, in other words, the dry-etching CD difference is a difference in the lateral dimension between a remaining portion of the resist film and a projection bottom.
These CD differences result from: (i) post-bake expansion and contraction of resist materials for patterning, and focus deviation when a resist is exposed during the photolithography process, and (ii) increase in the bottom dimension of projections caused by excessive adhesion of an etch product to projection sidewalls, and decrease in the bottom dimension of projections caused by side etching due to short adhesion of an etch product to projection sidewalls during the dry etching process.
CD differences produced during the dry etching process (dry-etching CD differences) are first described. For example, when polysilicon is etched using a conventional RIE (reactive ion etching) technique, CD differences are likely to occur, especially when HBr gas is used. The isolated projection 8a suffers from a severer CD difference than the closely spaced projection 8b. For example, suppose that a polysilicon layer corresponding to a gate length of about 0.5 xcexcm is patterned. For the case of the isolated projection 8a, the amount of dimensional increase of W2 (the bottom width of the projection 8a) with respect to W1 (the width of the remaining portion of the resist film 5) is about 0.05 xcexcm (see FIG. 18(b)). That is, W2 is greater than W1 by about 0.05 xcexcm. On the other hand, for the case of the closely spaced projection 8b, the amount of dimensional increase of W2 (the bottom width of the projection 8b ) with respect to W1 is close to zero (0.00 xcexcm). Generally a single semiconductor device contains therein an array of memory cells where transistors are densely placed and peripheral circuits where transistors are sparsely placed. Depending upon the location of transistors, variations in the CD difference from a mask pattern occur. As a result, the precision of the gate length of MOSFETs in a peripheral circuit becomes poor. This produces problems with the device electrical characteristics and the yield.
In order to prevent the occurrence of severe CD differences, a technique without using HBr gas has been proposed. For example, a high-vacuum etcher (e.g., an ECR that makes use of electron cyclotron resonance and a plasma source that makes use of helicon waves) has been proposed for the reduction of CD difference.
In photolithography technology, for the reduction of CD difference, various approaches have been tried. For example, the wavelength of light beams used for exposure is shortened and the mechanical accuracy of optical systems is improved. Presently, such mechanical accuracy has been improved to such an extent that processing accuracy corresponding to the wavelength of exposure light is obtained. For example, with respect to 0.35-xcexcm design rule devices, a current standard processing accuracy is about xc2x10.04 xcexcm when i-lines are used.
It has been known that CD differences in the photolithography process vary depending on the type of pattern. Generally, isolated projections suffer from a severer CD difference than closely spaced projections. Conventionally, a reticle pattern is pre-dimensioned in accordance with an expected CD difference for CD difference cancellation to a certain degree.
Many of the semiconductor manufacturers in the world are now trying to control each process steps of the fabrication of semiconductor devices by means of computers. In other words, the semiconductor industry aims at not only improving the basic characteristics of workpieces at each fabrication process step but also achieving FMS (flexible manufacturing system) by controlling individual wafers. Therefore, the reduction of variations in the device characteristic by controlling variations in the CD difference between each wafer has been considered important. Some semiconductor manufacturers are trying to individually control fabrication process steps, to control information about each wafer, and to control variations in the product characteristic, for accomplishing the uniformity of performance of products.
In the above-described dry etching and photolithography processes, the following disadvantages are produced.
Even in a dry etching process performed by a high-vacuum etcher, an isolated projection suffers from a severe CD difference, and the isolated-projection CD difference is different from the closely spaced-projection CD difference. Conventional techniques find it hard to cancel CD differences. Variations in the CD difference are considered one of the main factors that decrease the yield when technology for the miniaturization of semiconductor devices further advances in the future. As described above, it is extremely hard for a conventional RIE-type etcher or a high-vacuum etcher to suppress variations in the CD difference.
Additionally, it is expected that control of the cross-sectional profile of projections (i.e., gate electrodes formed by etching) becomes important in the future. However, it is extremely difficult to accomplish such control.
Meanwhile, there are limits to which the wavelength of exposure light is shortened and there are also limits to which mechanical accuracy (e.g., the accuracy of lenses and the accuracy of alignment of components) is improved. Therefore, it seems impossible to expect remarkable improvements in the processing accuracy. Additionally, even if the CD difference is reduced by reducing the dimension of reticle patterns, there still occur variations in the CD difference in a photolithography process. Although it has been recognized that such variations occur, it is hard to thoroughly cancel it due to mechanical limitations. Further, the miniaturization of devices presents new problems. For example, variations in the CD difference that have been conventionally considered negligible now become critical.
If information control at wafer level is made, and if final CD differences are made to become as constant as possible between wafers by controlling dry-etching CD differences on the basis of photolithography CD difference information for each wafer, this enables the production of devices having a uniform characteristic. It is also possible to allow an isolated projection and a closely spaced projection to have almost the same finish dimension by means of reduction of the dimension of photolithography masks.
To sum up, if the sum of a CD difference produced in a photolithography process and a CD difference produced in a dry etching process is made to become fixed, this reduces the degree of variations in the CD difference between wafers.
Accordingly, a first object of this invention is to clarify a mechanism of how variations in the CD difference occur in a dry etching process and to provide a method and apparatus for fabricating a semiconductor device capable of controlling dry-etching CD difference variations and workpiece cross-sections.
A second object of this invention is to control dry-etching CD differences in such a way that the sum of a photolithography CD difference and a dry-etching CD difference becomes fixed (i.e., the CD difference between a master pattern and a final workpiece pattern). More specifically, the CD difference is controlled in wafer by a computer and etch parameters (e.g., the gas flow rate) are changed in a dry etching process so that a specific CD difference is produced.
The mechanism of how CD differences occur, which became clarified as this invention was developed, is first explained.
Generally, in the dry etching process, an etch gas in the state of plasma reacts with a decomposition product from a portion to be etched, to form an etch product. The etch product produced sticks to the sidewalls of a recess, whereupon lateral etching is adequately prevented and anisotropic etching is accomplished. However, especially for the case of an isolated projection, it is likely that the bottom width of an isolated projection becomes greater than the width of a corresponding remaining portion of the etch mask. The reason for this may be considered as follows. The amount of production of an etch product increases at a recess because the distance between isolated projections (the recess width) is great. As a result, the etch product excessively sticks to the sidewalls and etching is prevented excessively. This is illustrated by making reference to FIGS. 18(a)-18(c).
In the recess 9, the active species 1 sticks to the polysilicon layer 4 to be etched (see FIG. 18(a)). The ion 2 strikes on the surface of the polysilicon layer 4 and its kinetic energy promotes reaction so that etching progresses. However, the amount of adhesion of the etch product 3 to the sidewalls of the closely spaced projection 8b is different from the amount of adhesion of the etch product 3 to the sidewalls of the isolated projection 8a. In other words, the width of the isolated recess 9a on the side of the isolated projection 8a is great, thereby creating a greater etch area. Therefore, the amount of adhesion of the etch product 3 to the sidewall of the isolated projection 8a is large. In other words, the film thickness of a deposition on the sidewall increases, thereby enhancing the action of preventing lateral etching. As a result, as shown in FIG. 18(b), W2 (the bottom width of the isolated projection 8a) becomes greater than W1 (the top width of the isolated projection 8a=the dimension of the corresponding remaining portion of the resist film 5). The width of the closely spaced recess 9b between the closely spaced projections 8b is narrow, thereby producing a smaller etch area. Therefore, the amount of adhesion of the etch product 3 to the sidewall of the closely spaced recess 9b is small. This reduces the action of preventing etching towards the sidewall. Accordingly, as shown in FIG. 18(c), there is little or no difference between the bottom width W2 and the top width W1 of the closely spaced projection 8b. In this way, the CD difference of the isolated projection 8a becomes greater than the CD difference of the closely spaced projection 8b. 
It is presumed that the above-described mechanism causes variations in the CD difference between devices (e.g., transistors) placed in a single chip.
In accordance with the present invention, the CD difference of isolated projections is reduced by controlling projection cross-sections, to cancel variations in the CD difference between isolated projections and closely spaced projections.
The present invention provides a first method of fabricating a semiconductor device. The first semiconductor device fabrication method comprises the steps of:
(a) placing in a reaction chamber a semiconductor wafer having on a surface thereof a layer to be etched which is covered by an etch mask having a pattern of remaining portions and opening portions, and introducing an etch gas into the reaction chamber; and
(b) performing a dry etching process to selectively etch away the layer through the etch mask to form projections underneath the remaining portions and recesses underneath the opening portions;
wherein both the pressure and the flow rate of the etch gas in the reaction chamber are controlled for controlling the rate that an etch product produced during the dry etching process is discharged to outside the recess, and for controlling the rate that an etch product sticks to sidewalls of the projection, in order to have a critical dimension difference, which is a difference in lateral dimension between the bottom of the projection and the remaining portion, fall in a predetermined range.
Such control of the gas pressure and the gas flow rate achieves control of the CD difference of a layer to be etched. Although such a mechanism has not been clarified yet, it is presumed that the following actions are involved.
When the gas pressure is increased, both the active species 1 and the etch product 3 come to have a mean free path (xcex) sufficiently smaller than the reaction chamber dimension (d) (or the wafer size) (for example, when P=100 millitorr and d=20 cm). xcex is determined mostly by the etch pressure (p). Then, the state of gas becomes a viscous flow. At this time, a neutral gas acts as a resistor when an etch product is about to stick to a projection sidewall. When both the gas pressure and the gas flow rate are further increased, a strong turbulent flow is created in the recess 9, which enhances the action of preventing an etch product from sticking to the sidewall. Because of these two actions, when the gas pressure and the gas flow rate increase, the rate that an etch product sticks to a projection sidewall decreases.
When the gas pressure increases, the weight of gas per unit volume likewise increases, in other words, the viscosity increases. As a result, the efficiency of transport of an etch product increases, which enhances the action of discharging an etch product to an overhead space. In other words, the etch product 3, which contributes to protecting a projection sidewall against etching, is caught in a flow of gas in bulk and is discharged. Additionally, in the reaction chamber, a space over a gas flow towards the vicinity of the bottom and sidewall of a recess which has little or no flow and which is in the state of static pressure, is in the state of negative pressure. As the gas flow rate increases the difference between negative pressure and positive pressure likewise increases, which promotes discharge of an etch product. In other words, when either the gas pressure or the gas flow rate increases, the rate that the etch product 3 is discharged by the foregoing actions as well as by the foregoing strong turbulent flow to an overhead space likewise increases.
If either the gas pressure or the gas flow rate is decreased, the rate that the etch product 3 sticks to a projection sidewall increases.
The gas pressure and the gas flow rate are controlled and the above-described actions relate to each other wherein one of the actions is a main action, whereupon it becomes possible to control both the rate that an etch product is discharged to an overhead space and the rate that an etch product sticks to a sidewall. This not only facilitates control of the cross section of projections, but also reduces the CD difference of isolated projections.
It is preferable that in the first method the gas pressure is greater than or equal to 5 millitorr and the gas flow rate is greater than or equal to 100 sccm.
As a result of such arrangement, the gas viscosity increases, the difference in pressure between a recess sidewall and an overhead space increases, and the strength of turbulent flow increases. Therefore, the efficiency of transport of an etch product to an overhead space is enhanced and the CD difference is reduced.
In the first method, at least one of the projections may be an isolated projection which has a bottom having a lateral dimension less than or equal to 0.4 xcexcm and which is sandwiched between recesses each having a lateral dimension greater than or equal to 1 xcexcm.
Accordingly the form of isolated projections with a great CD difference is improved.
It is possible that in the first method at least one of the projections is an isolated projection which is sandwiched between recesses having a lateral dimension greater than or equal to 1 xcexcm and wherein the remaining projections are projections which are closely spaced in such a way as to define therebetween a recess with a lateral dimension less than or equal to 1 xcexcm.
As a result of such arrangement, the following advantages are obtained. Variations in the CD difference between isolated projections and closely spaced projections are suppressed. In other words, when the gas flow velocity is increased gradually, the velocity of discharge of the etch product 3 is likewise increased as shown in FIG. 1(a), which means that the time of residence of the etch product 3 over the etch surface becomes shorter. The effect of shortening the residence time varies depending upon the etch pattern. In the isolated recess 9a, the etch product 3 is likely to be influenced by the gas flow and therefore the effect of shortening the residence time is exhibited obviously. On the other hand, the closely spaced recess 9b has a narrow, complicated topography so that the residence time of the etch product 3 is unlikely influenced by the gas flow. As a result, the reduction of variations in the CD difference is accomplished, since the closely spaced projection CD difference varies little while the isolated projection CD difference decreases as the gas flow rate increases.
It is preferable that in the first method a product of the pressure of gas in the reaction chamber and the diameter of the reaction chamber is greater than or equal to 0.2 Kg/sec2.
Accordingly, there is obtained power capable of transporting an etch product from a recess to an overhead space. This facilitates control of the CD difference.
It is preferable that in the first method the etch gas contains at least either one of a halogen gas and a halide gas.
It is preferable that in the first method the halogen gas is either a hydrogen bromide gas, a mixture of a hydrogen bromide gas and a chlorine gas, or a mixture of a hydrogen bromide gas and a hydrogen chloride gas.
Accordingly high-dry etching efficiency is performed and CD differences become controllable.
It is possible that in the first method the layer to be etched is formed of a material that contains at least either one of single-crystal silicon, polysilicon, Al, Cu, W, Ti, Co, Ta, Mo, or Ni.
As a result of such arrangement, the precision of form of various devices as well as the precision of form of wirings is improved.
The first method of the present invention further includes:
(c) performing a photolithography process to form an etch mask of a resist film;
(d) measuring the lateral length of a remaining portion of the etch mask; and
(e) determining the pressure and the flow rate of the etch gas in the reaction chamber according to a result of the step (d);
wherein in the step (b) dry etching is performed according to results of the step (e).
As a result of such arrangement, it becomes possible to control the dry-etching CD difference in consideration of the difference between the dimension of an etch mask and the finish dimension of a layer to be etched. The precision of finish of a layer to be etched improves, accordingly.
In a photolithography process to form an etch mask, variations in the CD difference between wafers (i.e., the difference between the reticle dimension and the etch mask dimension) include statistical variations. Generally, statistical variations form a normal distribution and its central value is a mean CD difference in a photolithography process. Likewise, in a dry etching process, variations in the CD difference between wafers (i.e., the difference between the resist pattern dimension and the post-etching dimension) include statistical variations forming a normal distribution.
In a conventional semiconductor-device fabrication method in which photolithography and dry etching processes are not related to each other, the mean value of the finish dimension of a layer to be etched deviates from a target dimension by the sum of a photolithography CD difference and a dry-etching CD difference. Statistically, the finish dimension of a layer to be etched varies greatly because of superposition of variation in the photolithography CD difference and variation in the dry-etching CD difference.
Conversely, in accordance with the present invention, dry-etching CD differences are controlled in such a way as to rectify CD differences produced in a photolithography process, whereupon the mean value of the finish dimension of a layer to be etched almost corresponds to a target value. Additionally, dry-etching CD differences are controlled in such a way as to cancel variations in the etch mask dimension produced in a photolithography process. Reduction of variations in the finish dimension of a layer to be etched is accomplished.
It is possible that in the step (b) the pressure of gas in the reaction chamber is fixed and the determined gas flow rate is used as an exogenous parameter for gas flow rate control.
Because of such arrangement, control of the gas flow rate can be performed more easily than control of the gas pressure, whereupon control of the state of in-chamber gas is facilitated and a layer to be etched is dimensioned to a target dimension.
It is possible that the step (d), the step (e), and the gas flow rate control in the step (b) are performed per semiconductor wafer.
Accordingly, while achieving reduction of variations in the finish dimension of a layer to be etched, a dry etching process can be performed in consideration of hysteresis of individual wafers. A semiconductor-device fabrication method suitable for FMS (flexible manufacturing system) is provided.
The step (e) may determine a gas flow rate by approximating a critical dimension difference versus gas flow rate relationship for a predetermined gas pressure by a hyperbolic function.
Accordingly, fast determination of an adequate gas flow rate for dry etching is achieved on the basis of the experimentally-obtained fact that the relationship between a CD difference and a gas flow rate can be approximated by hyperbolic functions. Therefore, steps of the semiconductor device fabrication are smoothly performed. It is experimentally proved that a CD difference (d) versus gas flow rate (f) relationship can be approximated by a hyperbolic function: (dxe2x88x92do) (fxe2x88x92fo)=A, where do, fo, and A are constants determined by the gas pressure. This means that, if the CD difference versus gas flow rate relationship for a predetermined gas pressure with respect to various materials for a layer to be etched and various gases, is fully understood, this quickly determines an adequate gas flow rate for a dry etching process by measurement of remaining portions of an etch mask.
The step (c) may form an etch mask in such a way that a remaining portion thereof corresponding to an isolated projection of the layer to be etched, has a lateral dimension smaller than a finish dimension of the isolated projection by a predetermined value.
As a result of such arrangement, it is possible to allow a layer to be etched to have a desired finish dimension by having the bottom of an isolated projection have a lateral dimension greater than the lateral dimension of a corresponding remaining portion by a predetermined value. Accordingly, such a severe dry etching condition that a CD difference of zero is required may be eliminated, and control of semiconductor devices during the fabrication becomes easy.
The present invention provides an apparatus for fabricating a semiconductor device. This apparatus comprises:
(a) a reaction chamber for accommodating a semiconductor wafer having on a surface thereof a layer to be etched which is covered with an etch mask having a pattern of remaining portions and opening portions;
(b) gas supply means for introducing an etch gas into the reaction chamber;
(c) plasma generation means for bringing the etch gas into the state of plasma to perform a dry etching process to selectively etch away said layer to form projections underneath the remaining portions and recesses underneath the opening portions; and
(d) control means for controlling at least either one of the pressure and the flow rate of the etch gas in the reaction chamber, to have a critical dimension difference, which is a difference in lateral dimension between the bottom of the projection and the remaining portion, fall in a predetermined range.
The gas supply means may introduce into the reaction chamber the etch gas at a predetermined pressure and the control means is operable to change the flow rate of the etch gas in the reaction chamber.
As a result of such arrangement, it becomes possible to control the CD difference with ease. This provides an improved semiconductor device with a layer to be etched having high finish dimension precision.
The control means may include:
(d-1) adjustment means for adjusting at least either one of the gas pressure and the gas flow rate;
(d-2) memory means for storing, in the form of a database, a critical dimension difference versus gas pressure relationship and a critical dimension difference versus gas flow rate relationship obtained from pre-measurement of an already-etched sample which is formed of the same material as the layer and is covered with the same pattern as the layer.
(d-3) arithmetic means for performing, based on the relationships, arithmetic operations to find a gas pressure and a gas flow rate in order for the projection to have a bottom having a desired dimension;
(d-4) transfer means for providing results of the arithmetic operation to the adjustment means.
It is preferable that the arithmetic means determines a gas flow rate by approximating a critical dimension difference versus gas flow rate relationship for a predetermined gas pressure by a hyperbolic function
As result of such arrangement, it becomes possible to quickly determine an adequate gas flow rate condition in a dry etching process and to provide an inexpensive semiconductor device with a layer to be etched having high finish dimension precision.
It is preferable that the gas supply means introduces into the reaction chamber the etch gas that contains at least either one of a halogen gas and a halide gas.
It is preferable that the halogen gas is either a hydrogen bromide gas, a mixture of a hydrogen bromide gas and a chlorine gas, or a mixture of a hydrogen bromide gas and a hydrogen chloride gas.
It is preferable that the layer is formed of a material that contains at least either one of single crystal silicon, polysilicon, Al, Cu, W, Ti, Co, Ta, Mo, or Ni.